Power Architect – AI SOC
This is the employer's own posting, not a copy on a job board.
What we know
Is it still open?
Confirmed still open
Last checked 2d ago — checked against the employer's own applicant tracking system, which is the company answering directly.
We re-read the employer's own applicant tracking system and the posting was still there. That is the company answering directly.
How old is it?
Posted 12d ago
The date the source published, not the day we noticed it (2026-10-20). Last seen at its source 4h ago.
We have tracked this listing since 21 Oct 2026 (12 days). The employer's own board has carried it every time we have read it, most recently 4 hours ago.
Is it remote?
The listing says yes
The location field doesn't say remote, so our assessment is based on the title or the description. Read the listing before applying.
Who may apply?
India
The description states no restriction of its own. This is the source's own tag.
Pay not stated
Similar roles pay $4,438–7,250/mo
Middle 50% of 12 listings that do state pay — Engineering · all levels · India · USD/month. This employer has published no salary; this is what comparable listings we hold disclose, never converted between currencies or periods. How this is calculated.
Skills named in the ad
Recognised terms only, from a fixed vocabulary — this is what CV matching compares against.
Carried by 1 source
-
Greenhouse employer's own board first seen 12d ago · last seen 4h ago
The listing
Power Architect – AI SOC
Location: Bangalore Hybrid/ Remote
About EnCharge AI
EnCharge AI is building the next generation AI platform. Our novel in-memory-computing architecture delivers a 10x step-function improvement in compute energy efficiency and performance for AI inference workloads. As the demands of artificial intelligence move beyond today's models, we believe fundamental underlying infrastructure must evolve. We are an experienced team of AI researchers, silicon & systems engineers, and architects backed by leading investors, poised to become the essential platform for the next wave of AI innovation.
- Architectural Influence: Drive comprehensive SoC-level power and thermal management architecture. Influence microarchitecture, memory hierarchies, and dataflows to minimize dynamic and leakage power for AI inference and training workloads.
- RTL & Floorplan Guidance: Review and guide RTL implementation to ensure consistency with power and timing goals. Collaborate directly with Physical Design (PD) teams to refine area constraints, floorplanning, and multi-voltage domain structures.
- PD Recipe Engineering: Develop, fine-tune, and build advanced Physical Design recipes (covering synthesis, placement, clock tree synthesis, and routing) specifically tailored to achieve best-in-class PPA targets.
- EDA & Custom Solutions: Partner with EDA vendors and internal teams to drive the adoption and customization of advanced power analysis tools (e.g., PowerArtist, PrimePower, Joules). Develop custom scripts and design workflows where standard tools fall short to squeeze out every milliwatt of power savings.
- Cross-Functional Collaboration: Lead PPA analysis and trade-off discussions across RTL, architecture, and PD teams. Act as the central hub to resolve complex bottlenecks and ensure the final silicon meets strict power budgets.
- A Critical Thinker: You look beyond block-level metrics to understand how early architectural choices impact the final silicon's physical layout and thermal limits.
- A Master Collaborator: You excel at breaking down silos, bringing together hardware, physical design, and software/firmware teams to achieve a unified PPA goal.
- An Innovator: You aren't satisfied with default EDA flows and actively build custom methodologies to push the boundaries of chip efficiency.
- BS/MS/PhD in Electrical Engineering, Computer Engineering, or a related field.
- 12+ years of semiconductor experience with a deep focus on SoC architecture, low-power RTL design, and Physical Design (PD) implementation.
- Proven track record of delivering complex, high-performance silicon (AI accelerators, GPUs, or advanced SoCs) under stringent PPA constraints.
- Hands-on expertise with power intent (UPF/CPF) and industry-standard power estimation/analysis tools.
- Strong scripting and automation skills (Python, Tcl, Perl) for customizing EDA tool flows and PPA data analysis.